I've been diving into the nand2tetris project and I'm trying to wrap my head around the structure of the Memory chip. I found an implementation on GitHub that's widely used and works flawlessly in simulations. The chip is defined as follows: `Memory` has inputs for `in`, `load`, and `address`, and outputs `out`. It utilizes various parts like DMux4Way, RAM16K, Screen, and Keyboard.
Now, I've written some code to read input from the keyboard and store it in RAM[1]. The code looks like this:
(loop)
@24577
D=M
@1
M=D
@loop
0;JMP
This works under the assumption that `@24577`, which routes to the Keyboard according to HDL rules, properly reflects the keyboard's output. However, I'm puzzled about the following code:
(loop)
@24576
D=M
@1
M=D
@loop
0;JMP
Both `@24576` and `@24577` have the same top two bits in the address, so I thought they should route to the Keyboard in a similar manner. Can anyone explain why one of these works and the other does not?
2 Answers
Glad you brought this up! The `u/` you mentioned usually indicates a placeholder in some documentation, but it’s definitely not standard in Hack Assembly. If you’re curious about learning more regarding that implementation, I can totally help with finding some clearer references.
It sounds like you're right about the addressing! But the key point is that even though both addresses have the same top bits, the specific functionality may vary based on how the Memory chip processes them. The second command seems to work because it correctly initializes the operation for the RAM, while the first one might not set the output correctly. Just check for any nuances in how the keyboard input is processed for those specific addresses.
That makes sense! So it’s possible that the address mapping is specific enough that even minor differences in the input can affect how the devices react. Good call to scrutinize those details!
I appreciate that! Let’s clarify some of the mappings in my system and make sure I'm on the right track.