Does the Core Ultra 5 250K Plus use the same physical die layout as the higher-tier 270K, with some cores disabled? If so, is there any way to identify which specific cores were disabled and where the active performance and efficiency cores are located on the chip?
I'm asking because my performance cores—0, 1, and 10–13—show noticeably different temperatures under load, and cores 0 and 1 also tend to run warmer during normal Windows use. I'm wondering whether adjusting cooler mounting pressure or reapplying thermal paste could improve temperatures. The Thermalright paste I used was unusually thick and difficult to squeeze out, so I'm not sure whether it spread properly.
The CPU is cooled by a Thermalright Silver Soul 110 with a second matching fan added. A short Prime95 test reached only the low 80°C range, but I'd still like to understand whether the temperature differences indicate an issue or are simply normal behavior.
3 Answers
You’re probably spending more effort on this than necessary. The integrated heat spreader is designed to distribute heat across its surface, so the physical position of individual cores usually doesn’t make cooler mounting adjustments worthwhile. Normal workload scheduling can also favor particular cores, which explains why cores 0 and 1 may run warmer outside of heavy loads.
The 250K Plus is very likely based on the same die as the 270K, with some cores disabled. The specific disabled cores are generally selected according to testing results, so they can vary from one chip to another. That means there probably isn’t a universal mapping between core numbers and their physical locations, and software can’t reliably tell you which locations are inactive.
Your temperatures sound completely healthy. The default thermal limit is around 105°C, and low-80s under Prime95 is well within the expected range. There’s no sign here that you need to change the mounting pressure or replace the paste.
That’s useful, thanks. I was mainly trying to figure out whether the temperature pattern pointed to a physical layout issue.
The disabled cores are effectively random from the user’s perspective, and there’s no practical way to determine their exact physical positions without examining the silicon directly. Even with a known die layout, the core numbering and binning would not give you a dependable map for your individual processor.
The temperature variation itself is not alarming. Different cores can have different leakage characteristics, and the heat spreader, sensors, and scheduler can all contribute to uneven readings. Reapplying paste is only worth considering if temperatures are unexpectedly high, not when a short stress test peaks in the low 80s.
I’m mostly trying to maximize component longevity, so I wanted to rule out poor paste or mounting. The paste was unusually solid and held its shape, which made me question whether it had aged or spread properly.